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hw/riscv/riscv_hart.c isolate tcg only bits

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riscv_cpu_register_csr_qtest_callback(), vcsr_call() and
csr_qtest_callback() are all TCG only and are not available in
--disable-tcg builds.

Signed-off-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Message-ID: <20260703180538.3346781-19-daniel.barboza@oss.qualcomm.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Daniel Henrique Barboza
2026-07-03 15:05:30 -03:00
committed by Alistair Francis
parent 209638d448
commit a0b0643890
1 changed files with 5 additions and 3 deletions
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8
hw/riscv/riscv_hart.c
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@@ -61,7 +61,7 @@ static void riscv_harts_cpu_reset(void *opaque)
cpu_reset(CPU(cpu));
}
#ifndef CONFIG_USER_ONLY
#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
static void csr_call(char *cmd, uint64_t cpu_num, int csrno, uint64_t *val)
{
RISCVCPU *cpu = RISCV_CPU(cpu_by_arch_id(cpu_num));
@@ -151,8 +151,10 @@ static void riscv_harts_realize(DeviceState *dev, Error **errp)
s->harts = g_new0(RISCVCPU, s->num_harts);
#ifndef CONFIG_USER_ONLY
riscv_cpu_register_csr_qtest_callback();
#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
if (qtest_enabled()) {
riscv_cpu_register_csr_qtest_callback();
}
#endif
for (n = 0; n < s->num_harts; n++) {