Wang Yechao 83a87a38b6 target/riscv/kvm: add extensions after v7.1-rc4 update ...

Expose zilsd, zclsd and zalasr.

Signed-off-by: Wang Yechao <wang.yechao255@zte.com.cn>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20260707072610.403595-1-wang.yechao255@zte.com.cn>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>

2026-07-09 15:38:59 +10:00

..

kvm

target/riscv/kvm: add extensions after v7.1-rc4 update

2026-07-09 15:38:59 +10:00

tcg

target/riscv: move riscv_cpu_set_aia_ireg_rmw_cb() to riscv_imsic

2026-07-09 14:58:03 +10:00

arch_dump.c

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common-semi-target.c

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cpu_bits.h

target/riscv: Define MSTATUS_SBE and MSTATUS_MBE bit masks

2026-05-27 11:50:12 +02:00

cpu_cfg_fields.h.inc

target/riscv: Add big-endian CPU configuration field and reset logic

2026-06-16 13:50:25 +10:00

cpu_cfg.h

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cpu_user.h

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cpu_vendorid.h

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cpu-param.h

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cpu-qom.h

target/riscv: add thead-c908 cpu support

2026-06-16 20:01:11 +10:00

cpu.c

target/riscv/cpu.c: filter TCG only bits in riscv_cpu_reset_hold()

2026-07-09 14:58:03 +10:00

cpu.h

target/riscv: move riscv_cpu_set_aia_ireg_rmw_cb() to riscv_imsic

2026-07-09 14:58:03 +10:00

gdbstub.c

target/riscv/gdbstub.c: isolate TCG only checks

2026-07-09 14:58:03 +10:00

helper.h

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insn16.decode

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insn32.decode

disas/riscv.c: add 'cbo' insns to disassembler

2026-06-15 13:10:14 +10:00

instmap.h

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internals.h

target/riscv: Implement runtime data endianness via MSTATUS bits

2026-06-16 13:40:38 +10:00

Kconfig

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machine.c

target/riscv: move debug.h to tcg subdir

2026-07-09 14:58:03 +10:00

meson.build

target/riscv: move pmp files to tcg subdir

2026-07-09 14:58:03 +10:00

monitor.c

target/riscv: move csr.h to tcg subdir

2026-07-09 14:58:03 +10:00

riscv-qmp-cmds.c

target/riscv: move csr.h to tcg subdir

2026-07-09 14:58:03 +10:00

sbi_ecall_interface.h

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time_helper.c

target/riscv: gate riscv_cpu_update_mip with tcg_enabled()

2026-07-09 14:58:03 +10:00

time_helper.h

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trace-events

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trace.h

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xlrbr.decode

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xmips.decode

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xthead.decode

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XVentanaCondOps.decode

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