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hw/riscv: Treat kernel_start_addr as vaddr

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Changes kernel_start_addr from target_ulong to vaddr. Logically, the
argument represents a virtual address at which to load the kernel image,
which gets treated as a hwaddr as a fallback if elf and uimage loading
fails.

Suggested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20251210132130.14465-1-anjo@rev.ng>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
This commit is contained in:
Anton Johansson
2025-12-10 14:21:30 +01:00
committed by Philippe Mathieu-Daudé
parent 70c0198ef3
commit ceaaeb2ad9
6 changed files with 13 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
hw/riscv/boot.c
View File

@@ -74,8 +74,8 @@ void riscv_boot_info_init(RISCVBootInfo *info, RISCVHartArrayState *harts)
info->is_32bit = riscv_is_32bit(harts);
}
hwaddr riscv_calc_kernel_start_addr(RISCVBootInfo *info,
hwaddr firmware_end_addr) {
vaddr riscv_calc_kernel_start_addr(RISCVBootInfo *info,
hwaddr firmware_end_addr) {
if (info->is_32bit) {
return QEMU_ALIGN_UP(firmware_end_addr, 4 * MiB);
} else {
@@ -228,7 +228,7 @@ static void riscv_load_initrd(MachineState *machine, RISCVBootInfo *info)
void riscv_load_kernel(MachineState *machine,
RISCVBootInfo *info,
target_ulong kernel_start_addr,
vaddr kernel_start_addr,
bool load_initrd,
symbol_fn_t sym_cb)
{

3
hw/riscv/microchip_pfsoc.c
View File

@@ -521,7 +521,8 @@ static void microchip_icicle_kit_machine_init(MachineState *machine)
uint64_t mem_low_size, mem_high_size;
hwaddr firmware_load_addr;
const char *firmware_name;
hwaddr firmware_end_addr, kernel_start_addr;
hwaddr firmware_end_addr;
vaddr kernel_start_addr;
uint64_t kernel_entry;
uint64_t fdt_load_addr;
DriveInfo *dinfo = drive_get(IF_SD, 0, 0);

3
hw/riscv/sifive_u.c
View File

@@ -515,7 +515,8 @@ static void sifive_u_machine_init(MachineState *machine)
MemoryRegion *system_memory = get_system_memory();
MemoryRegion *flash0 = g_new(MemoryRegion, 1);
hwaddr start_addr = memmap[SIFIVE_U_DEV_DRAM].base;
hwaddr firmware_end_addr, kernel_start_addr;
hwaddr firmware_end_addr;
vaddr kernel_start_addr;
const char *firmware_name;
uint32_t start_addr_hi32 = 0x00000000;
uint32_t fdt_load_addr_hi32 = 0x00000000;

2
hw/riscv/spike.c
View File

@@ -199,7 +199,7 @@ static void spike_board_init(MachineState *machine)
MemoryRegion *mask_rom = g_new(MemoryRegion, 1);
hwaddr firmware_end_addr = memmap[SPIKE_DRAM].base;
hwaddr firmware_load_addr = memmap[SPIKE_DRAM].base;
hwaddr kernel_start_addr;
vaddr kernel_start_addr;
char *firmware_name;
uint64_t fdt_load_addr;
uint64_t kernel_entry;

3
hw/riscv/virt.c
View File

@@ -1434,7 +1434,8 @@ static void virt_machine_done(Notifier *notifier, void *data)
machine_done);
MachineState *machine = MACHINE(s);
hwaddr start_addr = s->memmap[VIRT_DRAM].base;
hwaddr firmware_end_addr, kernel_start_addr;
hwaddr firmware_end_addr;
vaddr kernel_start_addr;
const char *firmware_name = riscv_default_firmware_name(&s->soc[0]);
uint64_t fdt_load_addr;
uint64_t kernel_entry = 0;

6
include/hw/riscv/boot.h
View File

@@ -43,8 +43,8 @@ bool riscv_is_32bit(RISCVHartArrayState *harts);
char *riscv_plic_hart_config_string(int hart_count);
void riscv_boot_info_init(RISCVBootInfo *info, RISCVHartArrayState *harts);
hwaddr riscv_calc_kernel_start_addr(RISCVBootInfo *info,
hwaddr firmware_end_addr);
vaddr riscv_calc_kernel_start_addr(RISCVBootInfo *info,
hwaddr firmware_end_addr);
hwaddr riscv_find_and_load_firmware(MachineState *machine,
const char *default_machine_firmware,
hwaddr *firmware_load_addr,
@@ -57,7 +57,7 @@ hwaddr riscv_load_firmware(const char *firmware_filename,
symbol_fn_t sym_cb);
void riscv_load_kernel(MachineState *machine,
RISCVBootInfo *info,
target_ulong kernel_start_addr,
vaddr kernel_start_addr,
bool load_initrd,
symbol_fn_t sym_cb);
uint64_t riscv_compute_fdt_addr(hwaddr dram_base, hwaddr dram_size,