friedkiwi/qemu
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

hw/acpi/tpm: parameterize PPI base address in tpm_build_ppi_acpi

Browse Source 
Add a ppi_base parameter to tpm_build_ppi_acpi() instead of
hardcoding TPM_PPI_ADDR_BASE. This prepares for ARM64 support where
PPI memory is dynamically allocated by the platform bus and the
address is not known at compile time.

Update the x86 callers (ISA TIS and CRB) to pass TPM_PPI_ADDR_BASE
explicitly. No behavioral change.

Reviewed-by: Stefan Berger <stefanb@linux.ibm.com>
Signed-off-by: Mohammadfaiz Bawa <mbawa@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260327173209.148180-3-mbawa@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
This commit is contained in:
Mohammadfaiz Bawa
2026-03-27 23:02:08 +05:30
committed by Philippe Mathieu-Daudé
parent ffdd1949a1
commit 859252e13b
4 changed files with 8 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
hw/acpi/tpm.c
View File

@@ -20,7 +20,7 @@
#include "qapi/error.h"
#include "hw/acpi/tpm.h"
void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev)
void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev, hwaddr ppi_base)
{
Aml *method, *field, *ifctx, *ifctx2, *ifctx3, *func_mask,
*not_implemented, *pak, *tpm2, *tpm3, *pprm, *pprq, *zero, *one;
@@ -40,7 +40,7 @@ void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev)
*/
aml_append(dev,
aml_operation_region("TPP2", AML_SYSTEM_MEMORY,
aml_int(TPM_PPI_ADDR_BASE + 0x100),
aml_int(ppi_base + 0x100),
0x5A));
field = aml_field("TPP2", AML_ANY_ACC, AML_NOLOCK, AML_PRESERVE);
aml_append(field, aml_named_field("PPIN", 8));
@@ -56,7 +56,7 @@ void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev)
aml_append(dev,
aml_operation_region(
"TPP3", AML_SYSTEM_MEMORY,
aml_int(TPM_PPI_ADDR_BASE +
aml_int(ppi_base +
0x15a /* movv, docs/specs/tpm.rst */),
0x1));
field = aml_field("TPP3", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
@@ -78,7 +78,7 @@ void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev)
aml_append(method,
aml_operation_region("TPP1", AML_SYSTEM_MEMORY,
aml_add(aml_int(TPM_PPI_ADDR_BASE), op, NULL), 0x1));
aml_add(aml_int(ppi_base), op, NULL), 0x1));
field = aml_field("TPP1", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
aml_append(field, aml_named_field("TPPF", 8));
aml_append(method, field);

2
hw/i386/acpi-build.c
View File

@@ -1219,7 +1219,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
aml_append(dev, aml_name_decl("_STA", aml_int(0xf)));
aml_append(dev, aml_name_decl("_UID", aml_int(1)));
tpm_build_ppi_acpi(tpm, dev);
tpm_build_ppi_acpi(tpm, dev, TPM_PPI_ADDR_BASE);
aml_append(sb_scope, dev);
}

2
hw/tpm/tpm_tis_isa.c
View File

@@ -159,7 +159,7 @@ static void build_tpm_tis_isa_aml(AcpiDevAmlIf *adev, Aml *scope)
*/
/* aml_append(crs, aml_irq_no_flags(isadev->state.irq_num)); */
aml_append(dev, aml_name_decl("_CRS", crs));
tpm_build_ppi_acpi(ti, dev);
tpm_build_ppi_acpi(ti, dev, TPM_PPI_ADDR_BASE);
aml_append(scope, dev);
}

3
include/hw/acpi/tpm.h
View File

@@ -20,6 +20,7 @@
#include "hw/core/registerfields.h"
#include "hw/acpi/aml-build.h"
#include "system/tpm.h"
#include "exec/hwaddr.h"
#ifdef CONFIG_TPM
@@ -250,7 +251,7 @@ REG32(CRB_DATA_BUFFER, 0x80)
*/
#define TPM_I2C_INT_ENABLE_MASK 0x0
void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev);
void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev, hwaddr ppi_base);
#endif /* CONFIG_TPM */