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hw/i2c/aspeed_i2c: Introduce AST1040 I2C model

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Introduce the AST1040 I2C controller model.

The AST1040 I2C controller is compatible with the AST2700 I2C controller,
including DMA support and the 64-bit DMA address registers. Set has_dma64 so
firmware can access the high address register and program it to zero, as the
CM4 CPU only supports 32-bit addressing.

AST1040 has 14 I2C buses and its HyperRAM is limited to 16 MiB,
so restrict the DMA low address mask to 0x00ffffff.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260603040027.938816-8-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
This commit is contained in:
Jamin Lin
2026-06-03 04:00:36 +00:00
committed by Cédric Le Goater
parent 7b9cd36bc1
commit 7e6329ca55
2 changed files with 34 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

33
hw/i2c/aspeed_i2c.c
View File

@@ -1654,6 +1654,34 @@ static void aspeed_1030_i2c_class_init(ObjectClass *klass, const void *data)
aic->dma_addr_lo_mask = 0x7fffffff;
}
static void aspeed_1040_i2c_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
AspeedI2CClass *aic = ASPEED_I2C_CLASS(klass);
dc->desc = "ASPEED 1040 I2C Controller";
/*
* AST1040 reuses the AST2700 I2C controller implementation since
* the AST1040 is compatible with AST2700. AST1040 has 14 I2C buses,
* and its HyperRAM is limited to 16 MiB, so the DMA low address
* mask is restricted accordingly.
*/
aic->num_busses = 14;
aic->reg_size = 0xa0;
aic->reg_gap_size = 0x60;
aic->gap = -1; /* no gap */
aic->bus_get_irq = aspeed_2600_i2c_bus_get_irq;
aic->pool_size = 0x40;
aic->pool_gap_size = 0xc0;
aic->pool_base = 0x1c0;
aic->bus_pool_base = aspeed_2500_i2c_bus_pool_base;
aic->has_dma = true;
aic->mem_size = 0x2000;
aic->has_dma64 = true;
aic->dma_addr_lo_mask = 0x00ffffff;
}
static void aspeed_2700_i2c_class_init(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -1703,6 +1731,11 @@ static const TypeInfo aspeed_i2c_types[] = {
.parent = TYPE_ASPEED_I2C,
.class_init = aspeed_1030_i2c_class_init,
},
{
.name = TYPE_ASPEED_1040_I2C,
.parent = TYPE_ASPEED_I2C,
.class_init = aspeed_1040_i2c_class_init,
},
{
.name = TYPE_ASPEED_2400_I2C,
.parent = TYPE_ASPEED_I2C,

1
include/hw/i2c/aspeed_i2c.h
View File

@@ -30,6 +30,7 @@
#define TYPE_ASPEED_2500_I2C TYPE_ASPEED_I2C "-ast2500"
#define TYPE_ASPEED_2600_I2C TYPE_ASPEED_I2C "-ast2600"
#define TYPE_ASPEED_1030_I2C TYPE_ASPEED_I2C "-ast1030"
#define TYPE_ASPEED_1040_I2C TYPE_ASPEED_I2C "-ast1040"
#define TYPE_ASPEED_2700_I2C TYPE_ASPEED_I2C "-ast2700"
OBJECT_DECLARE_TYPE(AspeedI2CState, AspeedI2CClass, ASPEED_I2C)