system/memory: Constify various MemoryRegionCache arguments

Mark the MemoryRegionCache structure const when it is only
accessed read-only.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20260616020359.18627-7-philmd@oss.qualcomm.com>
This commit is contained in:
Philippe Mathieu-Daudé
2026-03-19 13:38:52 +01:00
committed by Philippe Mathieu-Daudé
parent 47b23339a5
commit 77293ecc95
3 changed files with 23 additions and 20 deletions

View File

@@ -51,12 +51,12 @@ struct MemoryRegionCache {
#define SUFFIX _cached_slow
#define ARG1 cache
#define ARG1_DECL MemoryRegionCache *cache
#define ARG1_DECL const MemoryRegionCache *cache
#include "system/memory_ldst.h.inc"
/* Inline fast path for direct RAM access. */
static inline
uint8_t address_space_ldub_cached(MemoryRegionCache *cache, hwaddr addr,
uint8_t address_space_ldub_cached(const MemoryRegionCache *cache, hwaddr addr,
MemTxAttrs attrs, MemTxResult *result)
{
assert(addr < cache->len);
@@ -68,7 +68,7 @@ uint8_t address_space_ldub_cached(MemoryRegionCache *cache, hwaddr addr,
}
static inline
void address_space_stb_cached(MemoryRegionCache *cache,
void address_space_stb_cached(const MemoryRegionCache *cache,
hwaddr addr, uint8_t val,
MemTxAttrs attrs, MemTxResult *result)
{
@@ -93,7 +93,7 @@ void address_space_stb_cached(MemoryRegionCache *cache,
#define SUFFIX _cached
#define ARG1 cache
#define ARG1_DECL MemoryRegionCache *cache
#define ARG1_DECL const MemoryRegionCache *cache
#include "system/memory_ldst_phys.h.inc"
/**
@@ -145,7 +145,7 @@ static inline void address_space_cache_init_empty(MemoryRegionCache *cache)
* address that was passed to @address_space_cache_init.
* @access_len: The number of bytes that were written starting at @addr.
*/
void address_space_cache_invalidate(MemoryRegionCache *cache,
void address_space_cache_invalidate(const MemoryRegionCache *cache,
hwaddr addr,
hwaddr access_len);
@@ -160,9 +160,9 @@ void address_space_cache_destroy(MemoryRegionCache *cache);
* Internal functions, part of the implementation of address_space_read_cached
* and address_space_write_cached.
*/
MemTxResult address_space_read_cached_slow(MemoryRegionCache *cache,
MemTxResult address_space_read_cached_slow(const MemoryRegionCache *cache,
hwaddr addr, void *buf, hwaddr len);
MemTxResult address_space_write_cached_slow(MemoryRegionCache *cache,
MemTxResult address_space_write_cached_slow(const MemoryRegionCache *cache,
hwaddr addr, const void *buf,
hwaddr len);
@@ -175,7 +175,7 @@ MemTxResult address_space_write_cached_slow(MemoryRegionCache *cache,
* @len: length of the data transferred
*/
static inline MemTxResult
address_space_read_cached(MemoryRegionCache *cache, hwaddr addr,
address_space_read_cached(const MemoryRegionCache *cache, hwaddr addr,
void *buf, hwaddr len)
{
assert(addr < cache->len && len <= cache->len - addr);
@@ -197,7 +197,7 @@ address_space_read_cached(MemoryRegionCache *cache, hwaddr addr,
* @len: length of the data transferred
*/
static inline MemTxResult
address_space_write_cached(MemoryRegionCache *cache, hwaddr addr,
address_space_write_cached(const MemoryRegionCache *cache, hwaddr addr,
const void *buf, hwaddr len)
{
assert(addr < cache->len && len <= cache->len - addr);

View File

@@ -24,7 +24,8 @@
#define LD_P(size) \
glue(glue(ld, size), glue(ENDIANNESS, _p))
static inline uint16_t ADDRESS_SPACE_LD_CACHED(uw)(MemoryRegionCache *cache,
static inline
uint16_t ADDRESS_SPACE_LD_CACHED(uw)(const MemoryRegionCache *cache,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
{
assert(addr < cache->len && 2 <= cache->len - addr);
@@ -36,7 +37,8 @@ static inline uint16_t ADDRESS_SPACE_LD_CACHED(uw)(MemoryRegionCache *cache,
}
}
static inline uint32_t ADDRESS_SPACE_LD_CACHED(l)(MemoryRegionCache *cache,
static inline
uint32_t ADDRESS_SPACE_LD_CACHED(l)(const MemoryRegionCache *cache,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
{
assert(addr < cache->len && 4 <= cache->len - addr);
@@ -48,7 +50,8 @@ static inline uint32_t ADDRESS_SPACE_LD_CACHED(l)(MemoryRegionCache *cache,
}
}
static inline uint64_t ADDRESS_SPACE_LD_CACHED(q)(MemoryRegionCache *cache,
static inline
uint64_t ADDRESS_SPACE_LD_CACHED(q)(const MemoryRegionCache *cache,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
{
assert(addr < cache->len && 8 <= cache->len - addr);
@@ -71,7 +74,7 @@ static inline uint64_t ADDRESS_SPACE_LD_CACHED(q)(MemoryRegionCache *cache,
#define ST_P(size) \
glue(glue(st, size), glue(ENDIANNESS, _p))
static inline void ADDRESS_SPACE_ST_CACHED(w)(MemoryRegionCache *cache,
static inline void ADDRESS_SPACE_ST_CACHED(w)(const MemoryRegionCache *cache,
hwaddr addr, uint16_t val, MemTxAttrs attrs, MemTxResult *result)
{
assert(addr < cache->len && 2 <= cache->len - addr);
@@ -82,7 +85,7 @@ static inline void ADDRESS_SPACE_ST_CACHED(w)(MemoryRegionCache *cache,
}
}
static inline void ADDRESS_SPACE_ST_CACHED(l)(MemoryRegionCache *cache,
static inline void ADDRESS_SPACE_ST_CACHED(l)(const MemoryRegionCache *cache,
hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result)
{
assert(addr < cache->len && 4 <= cache->len - addr);
@@ -93,7 +96,7 @@ static inline void ADDRESS_SPACE_ST_CACHED(l)(MemoryRegionCache *cache,
}
}
static inline void ADDRESS_SPACE_ST_CACHED(q)(MemoryRegionCache *cache,
static inline void ADDRESS_SPACE_ST_CACHED(q)(const MemoryRegionCache *cache,
hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result)
{
assert(addr < cache->len && 8 <= cache->len - addr);

View File

@@ -3878,7 +3878,7 @@ int64_t address_space_cache_init(MemoryRegionCache *cache,
return l;
}
void address_space_cache_invalidate(MemoryRegionCache *cache,
void address_space_cache_invalidate(const MemoryRegionCache *cache,
hwaddr addr,
hwaddr access_len)
{
@@ -3909,7 +3909,7 @@ void address_space_cache_destroy(MemoryRegionCache *cache)
* address_space_cache_init.
*/
static inline MemoryRegion *address_space_translate_cached(
MemoryRegionCache *cache, hwaddr addr, hwaddr *xlat,
const MemoryRegionCache *cache, hwaddr addr, hwaddr *xlat,
hwaddr *plen, bool is_write, MemTxAttrs attrs)
{
MemoryRegionSection section;
@@ -3990,7 +3990,7 @@ static MemTxResult address_space_read_continue_cached(MemTxAttrs attrs,
* out of line function when the target is an MMIO or IOMMU region.
*/
MemTxResult
address_space_read_cached_slow(MemoryRegionCache *cache, hwaddr addr,
address_space_read_cached_slow(const MemoryRegionCache *cache, hwaddr addr,
void *buf, hwaddr len)
{
hwaddr mr_addr, l;
@@ -4007,7 +4007,7 @@ address_space_read_cached_slow(MemoryRegionCache *cache, hwaddr addr,
* out of line function when the target is an MMIO or IOMMU region.
*/
MemTxResult
address_space_write_cached_slow(MemoryRegionCache *cache, hwaddr addr,
address_space_write_cached_slow(const MemoryRegionCache *cache, hwaddr addr,
const void *buf, hwaddr len)
{
hwaddr mr_addr, l;
@@ -4020,7 +4020,7 @@ address_space_write_cached_slow(MemoryRegionCache *cache, hwaddr addr,
buf, len, mr_addr, l, mr);
}
#define ARG1_DECL MemoryRegionCache *cache
#define ARG1_DECL const MemoryRegionCache *cache
#define ARG1 cache
#define SUFFIX _cached_slow
#define TRANSLATE(...) address_space_translate_cached(cache, __VA_ARGS__)