tests/tcg: add test for MTE_STORE_ONLY

Added a test that checks that MTE checks are not performed on loads when
MTE_STORE_ONLY is enabled.

Signed-off-by: Gabriel Brookman <brookmangabriel@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20260529-feat-mte4-v7-15-ccbd3c14eb3c@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Gabriel Brookman
2026-05-29 12:52:55 -07:00
committed by Peter Maydell
parent 869e1cdec8
commit 45199fb0a0
3 changed files with 52 additions and 3 deletions

View File

@@ -64,7 +64,7 @@ AARCH64_TESTS += bti-2
# MTE Tests
ifneq ($(CROSS_CC_HAS_ARMV8_MTE),)
AARCH64_TESTS += mte-1 mte-2 mte-3 mte-4 mte-5 mte-6 mte-7 mte-8 mte-9
AARCH64_TESTS += mte-1 mte-2 mte-3 mte-4 mte-5 mte-6 mte-7 mte-8 mte-9 mte-10
mte-%: CFLAGS += $(CROSS_CC_HAS_ARMV8_MTE)
endif

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@@ -0,0 +1,49 @@
/*
* Memory tagging, write-only tag checking
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#include "mte.h"
void pass(int sig, siginfo_t *info, void *uc)
{
exit(0);
}
int main(int ac, char **av)
{
struct sigaction sa;
int *p0, *p1, *p2;
long excl = 1;
enable_mte(PR_MTE_TCF_SYNC | PR_MTE_STORE_ONLY);
p0 = alloc_mte_mem(sizeof(*p0));
/* Create two differently tagged pointers. */
asm("irg %0,%1,%2" : "=r"(p1) : "r"(p0), "r"(excl));
asm("gmi %0,%1,%0" : "+r"(excl) : "r" (p1));
assert(excl != 1);
asm("irg %0,%1,%2" : "=r"(p2) : "r"(p0), "r"(excl));
assert(p1 != p2);
/* Store the tag from the first pointer. */
asm("stg %0, [%0]" : : "r"(p1));
/*
* We write to p1 (stg above makes this check pass) and read from
* p2 (improperly tagged, but since it's a read, we don't care).
*/
*p1 = *p2;
/* enable handler */
memset(&sa, 0, sizeof(sa));
sa.sa_sigaction = pass;
sa.sa_flags = SA_SIGINFO;
sigaction(SIGSEGV, &sa, NULL);
/* now we write to badly tagged p2, should fault. */
*p2 = 0;
abort();
}

View File

@@ -40,10 +40,10 @@
# define SEGV_MTESERR 9
#endif
static void enable_mte(int tcf)
static void enable_mte(int flags)
{
int r = prctl(PR_SET_TAGGED_ADDR_CTRL,
PR_TAGGED_ADDR_ENABLE | tcf | (0xfffe << PR_MTE_TAG_SHIFT),
PR_TAGGED_ADDR_ENABLE | flags | (0xfffe << PR_MTE_TAG_SHIFT),
0, 0, 0);
if (r < 0) {
perror("PR_SET_TAGGED_ADDR_CTRL");