This commit removes TARGET_INSN_START_EXTRA_WORDS and force all arch to call the same version of tcg_gen_insn_start, with additional 0 arguments if needed. Since all arch have a single call site (in translate.c), this is as good documentation as having a single define. The notable exception is target/arm, which has two different translate files for 32/64 bits. Since it's the only one, we accept to have two call sites for this. As well, we update parameter type to use uint64_t instead of target_ulong, so it can be called from common code. Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-id: 20260219040150.2098396-15-pierrick.bouvier@linaro.org Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
24 lines
454 B
C
24 lines
454 B
C
/*
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* MIPS cpu parameters for qemu.
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*
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* SPDX-License-Identifier: LGPL-2.0-or-later
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*/
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#ifndef MIPS_CPU_PARAM_H
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#define MIPS_CPU_PARAM_H
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#ifdef TARGET_ABI_MIPSN64
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#define TARGET_PHYS_ADDR_SPACE_BITS 48
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#define TARGET_VIRT_ADDR_SPACE_BITS 48
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#else
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#define TARGET_PHYS_ADDR_SPACE_BITS 40
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# ifdef CONFIG_USER_ONLY
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# define TARGET_VIRT_ADDR_SPACE_BITS 31
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# else
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# define TARGET_VIRT_ADDR_SPACE_BITS 32
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#endif
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#endif
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#define TARGET_PAGE_BITS 12
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#endif
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