imaginos dd595103db disas/riscv: enable mnret disassembly ...

The translator has supported mnret since commit 3157a553ec
("target/riscv: Add Smrnmi mnret instruction"), but the
disassembler still renders it as illegal. Add it unguarded,
since the encoding does not overlap any other extension.

Signed-off-by: imaginos <imaginos32@gmail.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20260614141315.17320-1-imaginos32@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>

2026-06-16 20:00:47 +10:00

..

alpha.c

…

capstone.c

…

disas-common.c

disas: Prefer cached CpuClass over CPU_GET_CLASS() macro

2025-03-09 17:00:47 +01:00

disas-host.c

buildsys: Stop checking for ESA/390 host

2026-06-05 12:30:33 +02:00

disas-internal.h

disas: Split disas.c

2024-05-15 08:55:19 +02:00

disas-mon.c

include/system: Move exec/memory.h to system/memory.h

2025-04-23 14:08:21 -07:00

disas-target.c

disas: Use translator_st to get disassembly data

2024-05-15 08:55:19 +02:00

hexagon.c

Hexagon (target/hexagon) Disassembly of invalid packets

2026-04-23 14:49:38 -07:00

hppa.c

disas/hppa: implement mfdiag/mtdiag disassembly

2025-01-30 13:37:20 +01:00

m68k.c

disas/m68k: Replace sprintf() by snprintf()

2024-06-04 10:02:39 +02:00

meson.build

disas: diassemble RISC-V xlrbr (crc32) instructions

2026-04-29 11:41:00 +10:00

microblaze.c

disas/microblaze: Split get_field_special

2024-06-05 12:29:54 -07:00

mips.c

…

nanomips.c

nanomips: fix warnings with GCC 14

2024-04-08 21:21:48 +02:00

objdump.c

disas: Split disas.c

2024-05-15 08:55:19 +02:00

riscv-xlrbr.c

disas: diassemble RISC-V xlrbr (crc32) instructions

2026-04-29 11:41:00 +10:00

riscv-xlrbr.h

disas: diassemble RISC-V xlrbr (crc32) instructions

2026-04-29 11:41:00 +10:00

riscv-xthead.c

disas/riscv: Clean up includes

2024-01-30 21:20:20 +03:00

riscv-xthead.h

…

riscv-xventana.c

disas/riscv: Clean up includes

2024-01-30 21:20:20 +03:00

riscv-xventana.h

…

riscv.c

disas/riscv: enable mnret disassembly

2026-06-16 20:00:47 +10:00

riscv.h

disas/riscv: Make rv_decode::cfg const

2026-02-03 14:57:34 +01:00

sh4.c

…

sparc.c

…

xtensa.c

…