10059583c7
This commit removes TARGET_INSN_START_EXTRA_WORDS and force all arch to call the same version of tcg_gen_insn_start, with additional 0 arguments if needed. Since all arch have a single call site (in translate.c), this is as good documentation as having a single define. The notable exception is target/arm, which has two different translate files for 32/64 bits. Since it's the only one, we accept to have two call sites for this. As well, we update parameter type to use uint64_t instead of target_ulong, so it can be called from common code. Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-id: 20260219040150.2098396-15-pierrick.bouvier@linaro.org Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
28 lines
721 B
C
28 lines
721 B
C
/*
|
|
* Alpha cpu parameters for qemu.
|
|
*
|
|
* Copyright (c) 2007 Jocelyn Mayer
|
|
* SPDX-License-Identifier: LGPL-2.0-or-later
|
|
*/
|
|
|
|
#ifndef ALPHA_CPU_PARAM_H
|
|
#define ALPHA_CPU_PARAM_H
|
|
|
|
/* ??? EV4 has 34 phys addr bits, EV5 has 40, EV6 has 44. */
|
|
#define TARGET_PHYS_ADDR_SPACE_BITS 44
|
|
|
|
#ifdef CONFIG_USER_ONLY
|
|
/*
|
|
* Allow user-only to vary page size. Real hardware allows only 8k and 64k,
|
|
* but since any variance means guests cannot assume a fixed value, allow
|
|
* a 4k minimum to match x86 host, which can minimize emulation issues.
|
|
*/
|
|
# define TARGET_PAGE_BITS_VARY
|
|
# define TARGET_VIRT_ADDR_SPACE_BITS 63
|
|
#else
|
|
# define TARGET_PAGE_BITS 13
|
|
# define TARGET_VIRT_ADDR_SPACE_BITS (30 + TARGET_PAGE_BITS)
|
|
#endif
|
|
|
|
#endif
|