79d586d021
Generally we expect a PMBus sensor to issue writes after all pending reads have completed. If a data read needs to be resumed, this state can be tracked in the device model and the pending data placed in the output buffer. Signed-off-by: Titus Rwantare <titusr@google.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Message-id: 20260706230056.1888992-4-titusr@google.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
125 lines
4.3 KiB
C
125 lines
4.3 KiB
C
/*
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* Analog Devices ADM1266 Cascadable Super Sequencer with Margin Control and
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* Fault Recording with PMBus
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*
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* Copyright 2022 Google LLC
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#include "qemu/osdep.h"
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#include <math.h>
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#include "hw/i2c/pmbus_device.h"
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#include "libqtest-single.h"
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#include "libqos/qgraph.h"
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#include "libqos/i2c.h"
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#include "qobject/qdict.h"
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#include "qobject/qnum.h"
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#include "qemu/bitops.h"
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#define TEST_ID "adm1266-test"
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#define TEST_ADDR (0x12)
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#define ADM1266_BLACKBOX_CONFIG 0xD3
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#define ADM1266_PDIO_CONFIG 0xD4
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#define ADM1266_READ_STATE 0xD9
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#define ADM1266_READ_BLACKBOX 0xDE
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#define ADM1266_SET_RTC 0xDF
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#define ADM1266_GPIO_SYNC_CONFIGURATION 0xE1
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#define ADM1266_BLACKBOX_INFORMATION 0xE6
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#define ADM1266_PDIO_STATUS 0xE9
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#define ADM1266_GPIO_STATUS 0xEA
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/* Defaults */
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#define ADM1266_OPERATION_DEFAULT 0x80
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#define ADM1266_CAPABILITY_DEFAULT 0xA0
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#define ADM1266_CAPABILITY_NO_PEC 0x20
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#define ADM1266_PMBUS_REVISION_DEFAULT 0x22
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#define ADM1266_MFR_ID_DEFAULT "ADI"
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#define ADM1266_MFR_ID_DEFAULT_LEN 32
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#define ADM1266_MFR_MODEL_DEFAULT "ADM1266-A1"
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#define ADM1266_MFR_MODEL_DEFAULT_LEN 32
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#define ADM1266_MFR_REVISION_DEFAULT "25"
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#define ADM1266_MFR_REVISION_DEFAULT_LEN 8
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#define TEST_STRING_A "a sample"
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#define TEST_STRING_B "b sample"
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#define TEST_STRING_C "rev c"
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static void compare_string(QI2CDevice *i2cdev, uint8_t reg,
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const char *test_str)
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{
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uint8_t expected_len = strlen(test_str);
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uint8_t resp[SMBUS_DATA_MAX_LEN] = {0};
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g_assert(expected_len + 1 < SMBUS_DATA_MAX_LEN);
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i2c_read_block(i2cdev, reg, resp, expected_len + 1);
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g_assert_cmpint(resp[0], ==, expected_len);
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g_assert_cmpstr((char *)resp + 1, ==, test_str);
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}
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static void write_and_compare_string(QI2CDevice *i2cdev, uint8_t reg,
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const char *test_str, uint8_t len)
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{
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char buf[SMBUS_DATA_MAX_LEN] = {0};
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buf[0] = len;
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strncpy(buf + 1, test_str, len);
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i2c_write_block(i2cdev, reg, (uint8_t *)buf, len + 1);
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compare_string(i2cdev, reg, test_str);
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}
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static void test_defaults(void *obj, void *data, QGuestAllocator *alloc)
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{
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uint16_t i2c_value;
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QI2CDevice *i2cdev = (QI2CDevice *)obj;
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i2c_value = i2c_get8(i2cdev, PMBUS_OPERATION);
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g_assert_cmphex(i2c_value, ==, ADM1266_OPERATION_DEFAULT);
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i2c_value = i2c_get8(i2cdev, PMBUS_REVISION);
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g_assert_cmphex(i2c_value, ==, ADM1266_PMBUS_REVISION_DEFAULT);
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compare_string(i2cdev, PMBUS_MFR_ID, ADM1266_MFR_ID_DEFAULT);
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compare_string(i2cdev, PMBUS_MFR_MODEL, ADM1266_MFR_MODEL_DEFAULT);
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compare_string(i2cdev, PMBUS_MFR_REVISION, ADM1266_MFR_REVISION_DEFAULT);
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}
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/* test r/w registers */
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static void test_rw_regs(void *obj, void *data, QGuestAllocator *alloc)
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{
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QI2CDevice *i2cdev = (QI2CDevice *)obj;
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/* empty strings */
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i2c_set8(i2cdev, PMBUS_MFR_ID, 0);
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compare_string(i2cdev, PMBUS_MFR_ID, "");
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i2c_set8(i2cdev, PMBUS_MFR_MODEL, 0);
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compare_string(i2cdev, PMBUS_MFR_MODEL, "");
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i2c_set8(i2cdev, PMBUS_MFR_REVISION, 0);
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compare_string(i2cdev, PMBUS_MFR_REVISION, "");
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/* test strings */
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write_and_compare_string(i2cdev, PMBUS_MFR_ID, TEST_STRING_A,
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sizeof(TEST_STRING_A));
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write_and_compare_string(i2cdev, PMBUS_MFR_ID, TEST_STRING_B,
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sizeof(TEST_STRING_B));
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write_and_compare_string(i2cdev, PMBUS_MFR_ID, TEST_STRING_C,
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sizeof(TEST_STRING_C));
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}
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static void adm1266_register_nodes(void)
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{
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QOSGraphEdgeOptions opts = {
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.extra_device_opts = "id=" TEST_ID ",address=0x12"
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};
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add_qi2c_address(&opts, &(QI2CAddress) { TEST_ADDR });
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qos_node_create_driver("adm1266", i2c_device_create);
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qos_node_consumes("adm1266", "i2c-bus", &opts);
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qos_add_test("test_defaults", "adm1266", test_defaults, NULL);
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qos_add_test("test_rw_regs", "adm1266", test_rw_regs, NULL);
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}
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libqos_init(adm1266_register_nodes);
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