904702f464
Emphasize that we're generating 64-bit code. Drop the explicit rename from meson's cpu. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
44 lines
923 B
C
44 lines
923 B
C
/* SPDX-License-Identifier: MIT */
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/*
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* Define PowerPC target-specific constraint sets.
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* Copyright (c) 2021 Linaro
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*/
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/*
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* C_On_Im(...) defines a constraint set with <n> outputs and <m> inputs.
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* Each operand should be a sequence of constraint letters as defined by
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* tcg-target-con-str.h; the constraint combination is inclusive or.
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*/
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C_O0_I1(r)
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C_O0_I2(r, r)
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C_O0_I2(r, rC)
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C_O0_I2(v, r)
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C_O0_I3(r, r, r)
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C_O0_I3(o, m, r)
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C_O0_I4(r, r, rU, rC)
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C_O0_I4(r, r, r, r)
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C_O1_I1(r, r)
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C_O1_I1(v, r)
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C_O1_I1(v, v)
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C_O1_I1(v, vr)
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C_O1_I2(r, 0, rZ)
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C_O1_I2(r, rI, r)
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C_O1_I2(r, r, r)
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C_O1_I2(r, r, ri)
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C_O1_I2(r, r, rC)
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C_O1_I2(r, r, rI)
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C_O1_I2(r, r, rT)
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C_O1_I2(r, r, rU)
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C_O1_I2(r, r, rZM)
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C_O1_I2(r, r, rZW)
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C_O1_I2(r, rI, rN)
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C_O1_I2(r, rZM, rZM)
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C_O1_I2(v, v, v)
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C_O1_I3(v, v, v, v)
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C_O1_I4(v, v, v, vZM, v)
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C_O1_I4(r, r, rC, rZ, rZ)
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C_O1_I4(r, r, r, rU, rC)
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C_O2_I1(r, r, r)
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C_N1O1_I1(o, m, r)
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C_O2_I2(r, r, r, r)
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