62822fc7e0
This is the minimal change beginning with TARGET_ARCH in configs/targets/or1k-* from openrisc to or1k, then adjust TARGET_OR1K, QEMU_ARCH_OR1K, directory names, and meson.build to match. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20260205030244.266447-2-richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
47 lines
1.4 KiB
C
47 lines
1.4 KiB
C
/*
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* OpenRISC specific CPU ABI and functions for linux-user
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*
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* Copyright (c) 2011-2012 Jia Liu <proljc@gmail.com>
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef OPENRISC_TARGET_CPU_H
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#define OPENRISC_TARGET_CPU_H
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static inline void cpu_clone_regs_child(CPUOpenRISCState *env,
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target_ulong newsp,
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unsigned flags)
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{
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if (newsp) {
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cpu_set_gpr(env, 1, newsp);
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}
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cpu_set_gpr(env, 11, 0);
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}
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static inline void cpu_clone_regs_parent(CPUOpenRISCState *env, unsigned flags)
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{
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}
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static inline void cpu_set_tls(CPUOpenRISCState *env, target_ulong newtls)
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{
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cpu_set_gpr(env, 10, newtls);
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}
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static inline abi_ulong get_sp_from_cpustate(CPUOpenRISCState *state)
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{
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return cpu_get_gpr(state, 1);
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}
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#endif
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