6fe7a5bba7
This simplifies check for no commpage to a NULL pointer
check, rather than reserved values for LO_COMMPAGE and
HI_COMMPAGE.
Unify {LO,HI}_COMMPAGE into a single COMMPAGE define.
Acked-by: Warner Losh <imp@bsdimp.com>
Tested-by: Helge Deller <deller@gmx.de>
Reviewed-by: Helge Deller <deller@gmx.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
43 lines
1.8 KiB
C
43 lines
1.8 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation, or (at your option) any
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* later version. See the COPYING file in the top-level directory.
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*/
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#ifndef HPPA_TARGET_ELF_H
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#define HPPA_TARGET_ELF_H
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#define ELF_CLASS ELFCLASS32
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#define ELF_MACHINE EM_PARISC
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#define HAVE_ELF_PLATFORM 1
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#define HAVE_ELF_CORE_DUMP 1
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/*
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* Matches struct user_regs_struct from arch/parisc/include/uapi/asm/ptrace.h.
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* ELF_NGREG = 80; register indices match those used by libunwind and gdb.
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*/
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typedef struct target_elf_gregset_t {
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abi_ulong gr[32]; /* gr[0..31]; PSW in gr[0] [0..31] */
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abi_ulong sr[8]; /* space registers [32..39] */
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abi_ulong iaoq[2]; /* instruction address offset [40..41] */
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abi_ulong iasq[2]; /* instruction address space [42..43] */
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abi_ulong sar; /* shift amount register (CR11) [44] */
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abi_ulong iir; /* interrupt instruction register [45] */
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abi_ulong isr; /* interrupt space register [46] */
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abi_ulong ior; /* interrupt offset register [47] */
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abi_ulong ipsw; /* interrupt PSW (CR22) [48] */
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abi_ulong cr0; /* recovery counter [49] */
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abi_ulong cr24_31[8]; /* cr24..cr31 [50..57] */
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abi_ulong cr8_15[6]; /* cr8, cr9, cr12, cr13, cr10, cr15 [58..63] */
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abi_ulong pad[16]; /* pad to 80 elements [64..79] */
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} target_elf_gregset_t;
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#define COMMPAGE 0
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#define STACK_GROWS_DOWN 0
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#define STACK_ALIGNMENT 64
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#define VDSO_HEADER "vdso.c.inc"
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#endif
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