Commit Graph

16747 Commits

Author SHA1 Message Date
Alex Bennée
345179a72f target/m68k: clean-up includes in cpu.c
We don't need translation-block.h as the TB flags are local and the
only bits needed come from cpu-ops.h. The vmstate is a system only
concerns so we can guard against including it for linux-user.

Finally tidy up the order to keep things together with the local cpu.h
kept at the end.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-ID: <20260219171810.602667-2-alex.bennee@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
936c783dab target/tricore: Build 'gdbstub.c' once for system single binary
There is a single qemu-system-tricore binary, but by moving
'gdbstub.c' in the target_common_system_arch[] source set
the resulting object can be linked into a single qemu-sytem
binary.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-50-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
cb543f4ac1 target/s390x: Build 'gdbstub.c' once for system single binary
There is a single qemu-system-s390x binary, but by moving
'gdbstub.c' in the target_common_system_arch[] source set
the resulting object can be linked into a single qemu-sytem
binary.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-49-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
dea007d310 target/rx: Build 'gdbstub.c' once for system single binary
There is a single qemu-system-rx binary, but by moving
'gdbstub.c' in the target_common_system_arch[] source set
the resulting object can be linked into a single qemu-sytem
binary.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-48-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
e9b39c7d72 target/m68k: Build 'gdbstub.c' once for system single binary
There is a single qemu-system-m68k binary, but by moving
'gdbstub.c' in the target_common_system_arch[] source set
the resulting object can be linked into a single qemu-sytem
binary.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-47-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
9c6bed12f4 target/loongarch: Build 'gdbstub.c' once for system single binary
There is a single qemu-system-loongarch64 binary, but by
moving 'gdbstub.c' in the target_common_system_arch[] source
set the resulting object can be linked into a single qemu-sytem
binary.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-46-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
7700b0106f target/avr: Build 'gdbstub.c' once for system single binary
There is a single qemu-system-avr binary, but by moving
'gdbstub.c' in the target_common_system_arch[] source set
the resulting object can be linked into a single qemu-sytem
binary.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-45-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
bbcab06e41 target/alpha: Build 'gdbstub.c' once for system single binary
There is a single qemu-system-alpha binary, but by moving
'gdbstub.c' in the target_common_system_arch[] source set
the resulting object can be linked into a single qemu-sytem
binary.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-44-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
ceffd13311 target/or1k: Build 'gdbstub.c' once for system single binary
There is a single qemu-system-or1k binary, but by moving
'gdbstub.c' in the target_common_system_arch[] source set
the resulting object can be linked into a single qemu-sytem
binary.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-43-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
eb908759ae target/or1k: Rename 'openrisc' -> 'or1k' in meson.build
Follow commit 62822fc7e0 ("target/or1k: Rename from openrisc").

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-42-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
b7288c06fd target/sh4: Build 'gdbstub.c' once for system binaries
'gdbstub.c' can now be built once for all qemu-system-sh4*
binaries.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-41-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
1c94da7a34 target/sh4: Build 'monitor.c' once for system binaries
'monitor.c' can be built once for all qemu-system-sh4* binaries.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-40-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
a056e7a3b8 target/microblaze: Build 'gdbstub.c' once for system binaries
'gdbstub.c' can now be built once for all qemu-system-microblaze*
binaries.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-39-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
2420b3fdfb target/sparc: Expand gdb_get_regl() in gdb_get_rega()
Convert the gdb_get_rega() macro to an inlined function,
expanding gdb_get_regl() via a TARGET_SPARC64 definition check.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-37-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
e1824a1042 target/sh4: Expand gdb_get_regl() -> gdb_get_reg32()
The SH4 targets are only built as 32-bit:

  $ git grep TARGET_LONG_BITS configs/targets/sh4*
  configs/targets/sh4-linux-user.mak:5:TARGET_LONG_BITS=32
  configs/targets/sh4-softmmu.mak:2:TARGET_LONG_BITS=32
  configs/targets/sh4eb-linux-user.mak:6:TARGET_LONG_BITS=32
  configs/targets/sh4eb-softmmu.mak:3:TARGET_LONG_BITS=32

Mechanically replace:

  gdb_get_regl() -> gdb_get_reg32()

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-36-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
14a39fc17b target/rx: Expand gdb_get_regl() -> gdb_get_reg32()
The Renesas RX target is only built as 32-bit:

  $ git grep TARGET_LONG_BITS configs/targets/rx*
  configs/targets/rx-softmmu.mak:5:TARGET_LONG_BITS=32

Mechanically replace:

  gdb_get_regl() -> gdb_get_reg32()

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-35-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
7831e5f48d target/hexagon: Expand gdb_get_regl() -> gdb_get_reg32()
The Hexagon target is only built as 32-bit:

  $ git grep TARGET_LONG_BITS configs/targets/hexagon*
  configs/targets/hexagon-linux-user.mak:5:TARGET_LONG_BITS=32

Mechanically replace:

  gdb_get_regl() -> gdb_get_reg32()

Reviewed-by: Brian Cain <Brian.Cain@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-34-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
34fa8dbbf2 target/alpha: Expand gdb_get_regl() -> gdb_get_reg64()
The Alpha targets are only built as 64-bit:

  $ git grep TARGET_LONG_BITS configs/targets/alpha-*
  configs/targets/alpha-linux-user.mak:4:TARGET_LONG_BITS=64
  configs/targets/alpha-softmmu.mak:2:TARGET_LONG_BITS=64

Mechanically replace:

  gdb_get_regl() -> gdb_get_reg64()

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-33-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
62b7f6df56 target/i386: Expand 64-bit definitions when TARGET_LONG_BITS == 64
Where both gdb_read/write_register() functions check for
'TARGET_LONG_BITS == 64' we can expand the following definitions:

  ldtul_p() -> ldq_p()

  gdb_get_regl() -> gdb_get_reg64()

Do the same in i386_cpu_gdb_get_egprs(): check TARGET_LONG_BITS to
effectively inline gdb_get_regl().

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-31-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
7ca74dc98d target/i386: Replace ldtul_p() -> ldn_p()
Prefer ldn_p(target_long_bits) over target-specific ldtul_p().

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-ID: <20260219191955.83815-30-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
de32a75647 target/riscv: Remove unnecessary target_ulong type uses
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
Reviewed-by: Chao Liu <chao.liu.zevorn@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-29-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
7170bddcd9 target/riscv: Replace ldtul_p() -> ldn_p()
Prefer ldn_p(riscv_cpu_is_32bit) over target-specific ldtul_p().

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
Reviewed-by: Chao Liu <chao.liu.zevorn@gmail.com>
Message-ID: <20260219191955.83815-28-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
2497a8a6e1 target/mips: Replace ldtul_p() -> ldn_p()
Prefer ldn_p(target_long_bits/8) over target-specific ldtul_p().

Use deposit64() in gdb_write_register(), allowing to remove
'target_ulong' type uses.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-27-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
27385bc1ce target/ppc: Replace ldtul_p() -> ldn_p()
Prefer ldn_p(target_long_bits/8) over target-specific ldtul_p().

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-26-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
8ef71fe91c target/sparc: Factor sparc_cpu_gdb_write_register() out
Factor sparc_cpu_gdb_write_register() out.

Prefer ldn_p(target_long_bits/8) over target-specific ldtul_p().

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-25-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
6bd0ccc455 target/riscv: Remove empty target_monitor_defs() symbol
Prefer the stub target_monitor_defs() symbol introduced in commit
bf95728400 ("monitor: remove target-specific code from monitor.c").

Reviewed-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Chao Liu <chao.liu.zevorn@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-24-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
aa75a7c09b target/or1k: Use XML register definitions from GDB
Import gdb-xml/or1k-fpu.xml from mainstream binutils, tag
'binutils-2_46' [*]. Register as CPUClass::gdb_core_xml_file.

[*] https://sourceware.org/git/?p=binutils-gdb.git;a=blob_plain;f=gdb/features/or1k-core.xml;h=0d13f355f5296ae426794eb3003dcc18fbbd49d5;hb=refs/tags/binutils-2_46

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-23-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
c91f3330cc target/ppc: Extract monitor-related code to monitor.c
Keep ppc-qmp-cmds.c for QMP, use monitor.c for HMP.

Since ppc-qmp-cmds.c was introduced using the MIT license
(see commit bf95728400 "monitor: remove target-specific
code from monitor.c") retain the same license for the new
monitor.c file.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-22-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
53e6619ee0 target/ppc: Remove MonitorDef register entries available via gdbstub
All these registers are already provided by via gdbstub parsed XML
and handler by the gdb_get_register() helper in the monitor/hmp.c
file. Remove as now unreachable code.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-21-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
f7a46c64c8 target/m68k: Remove MonitorDef register entries available via gdbstub
All these registers are already provided by via gdbstub parsed XML
and handler by the gdb_get_register() helper in the monitor/hmp.c
file. Remove as now unreachable code.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-20-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
3200552839 target/i386: Remove MonitorDef register entries available via gdbstub
All these registers are already provided by via gdbstub parsed XML
and handler by the gdb_get_register() helper in the monitor/hmp.c
file. Remove as now unreachable code.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-19-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
d1a4a7dfc7 target/sparc: Remove MonitorDef register entries available via gdbstub
All these registers are already provided by via gdbstub parsed XML
and handler by the gdb_get_register() helper in the monitor/hmp.c
file. Remove as now unreachable code.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-18-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
fe1958cdb6 target/sparc: Expose gdbstub registers to sparc32 targets
Import gdb-xml/sparc32-{cpu,fpu,cp0}.xml from mainstream binutils,
tag 'binutils-2_46', found in the gdb/features/sparc/folder [*].

Register them by setting the CPUClass::gdb_core_xml_file field and
calling gdb_register_coprocessor() in sparc_cpu_register_gdb_regs().

[*] https://sourceware.org/git/?p=binutils-gdb.git;a=tree;f=gdb/features/sparc;hb=refs/tags/binutils-2_46

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-16-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
00c82c36b0 target/sparc: Restore 'gdb-xml/sparc64-cpu.xml'
Restore gdb-xml/sparc64-cpu.xml from mainstream binutils, tag
'binutils-2_46', found in the gdb/features/sparc/folder [*].

[*] https://sourceware.org/git/?p=binutils-gdb.git;a=tree;f=gdb/features/sparc;hb=refs/tags/binutils-2_46

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-14-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
85b4bcf3d5 target/sparc: Restore 'gdb-xml/sparc64-fpu.xml'
Restore gdb-xml/sparc64-fpu.xml from mainstream binutils, tag
'binutils-2_46', found in the gdb/features/sparc/folder [*].

Extract sparc_fpu_gdb_write_register() out of
sparc_cpu_gdb_read_register() and sparc_fpu_gdb_write_register()
out of sparc_cpu_gdb_write_register(), taking care to update the
register indexes in the switch cases.

Register these helpers with a call to gdb_register_coprocessor()
in sparc_cpu_register_gdb_regs().

[*] https://sourceware.org/git/?p=binutils-gdb.git;a=tree;f=gdb/features/sparc;hb=refs/tags/binutils-2_46

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-13-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
891601f2e4 target/sparc: Restore 'gdb-xml/sparc64-cp0.xml'
Restore gdb-xml/sparc64-cp0.xml from mainstream binutils, tag
'binutils-2_46', found in the gdb/features/sparc/folder [*].

Extract sparc_cp0_gdb_write_register() out of
sparc_cpu_gdb_read_register() and sparc_cp0_gdb_write_register()
out of sparc_cpu_gdb_write_register(), taking care to update the
register indexes in the switch cases.

Register these helpers with a call to gdb_register_coprocessor()
in sparc_cpu_register_gdb_regs().

[*] https://sourceware.org/git/?p=binutils-gdb.git;a=tree;f=gdb/features/sparc;hb=refs/tags/binutils-2_46

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-12-philmd@linaro.org>
2026-02-26 00:02:14 +01:00
Philippe Mathieu-Daudé
733c41f0aa target/sparc: Introduce sparc_cpu_register_gdb_regs() stub
Introduce sparc_cpu_register_gdb_regs() which we are going
to fill in the next commits.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-11-philmd@linaro.org>
2026-02-25 23:46:04 +01:00
Philippe Mathieu-Daudé
7ddd3aca5f gdbstub: Always infer gdb_num_core_regs when using XML file
Rather correct inferred count over invalid manual one.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-10-philmd@linaro.org>
2026-02-25 23:46:04 +01:00
Philippe Mathieu-Daudé
429471c801 target/ppc: Remove dead code depending on USE_APPLE_GDB
We never defined USE_APPLE_GDB, so the code introduced in commit
b3cad3abf6 ("PPC: Add support for Apple gdb in gdbstub") is dead
since almost 12 years. Remove it.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-9-philmd@linaro.org>
2026-02-25 23:46:04 +01:00
Philippe Mathieu-Daudé
1ec0fbe2dd target/ppc: Fix CPUClass::gdb_num_core_regs value
Only 70 registers are exposed from GDB XML file (for either
32 / 64-bit variants).

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-8-philmd@linaro.org>
2026-02-25 23:46:04 +01:00
Philippe Mathieu-Daudé
c60750fe5e target/riscv: Extract monitor-related code to monitor.c
Keep riscv-qmp-cmds.c for QMP, use monitor.c for HMP.

Reviewed-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-7-philmd@linaro.org>
2026-02-25 23:46:04 +01:00
Philippe Mathieu-Daudé
e4eff9dfaa target/alpha: Document gdbstub register indexes
Follow GDB XML comments. Re-order switch cases for clarity.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-6-philmd@linaro.org>
2026-02-25 23:46:04 +01:00
Philippe Mathieu-Daudé
e015ae3074 target/i386: Inline GDB_FORCE_64 definition
Directly checking TARGET_LONG_BITS allows to remove GDB_FORCE_64.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-4-philmd@linaro.org>
2026-02-25 23:46:04 +01:00
Philippe Mathieu-Daudé
197c6071df target/ppc: Remove PPC_DEBUG_SPR left-over comment
The PPC_DEBUG_SPR definition was fully removed in commit
6113563982 ("target/ppc: Clean up _spr_register et al").

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-3-philmd@linaro.org>
2026-02-25 23:46:04 +01:00
Philippe Mathieu-Daudé
69fe6185ff target/ppc: Move user_only_helper.c to target_user_arch[] source set
Since commit 46369b50ee ("meson: Introduce meson_user_arch
source set for arch-specific user-mode") using target_user_arch[] is
preferred because clearer, and no need to filter on CONFIG_USER_ONLY.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-2-philmd@linaro.org>
2026-02-25 23:46:04 +01:00
Anton Johansson
cf884c075e exec: Drop TARGET_PHYS_ADDR_SPACE_BITS
The macro is no longer in use and can safely be dropped.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Brian Cain <brian.cain@oss.qualcomm.com>
Signed-off-by: Anton Johansson <anjo@rev.ng>
Message-ID: <20260218-phys_addr-v6-7-a603bf363218@rev.ng>
[PMD: Keep TARGET_PHYS_ADDR_SPACE_BITS poisoned]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2026-02-25 23:46:04 +01:00
Anton Johansson
56599a705f target/loongarch: Introduce loongarch_palen_mask()
In preparation for dropping TARGET_PHYS_ADDR_SPACE_BITS, define a
runtime function to construct a mask from the PALEN cpucfg field.
The mask is then used when converting from virtual to physical
addresses.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Anton Johansson <anjo@rev.ng>
Message-ID: <20260218-phys_addr-v6-4-a603bf363218@rev.ng>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2026-02-25 23:46:04 +01:00
Anton Johansson
ab7a864082 target/i386: Drop physical address range checks
Since TARGET_PHYS_ADDR_SPACE_BITS is now fixed to 64 bits for all
targets we can remove range checks on cpu->phys_bits and
TCG_PHYS_ADDR_BITS.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Anton Johansson <anjo@rev.ng>
Message-ID: <20260218-phys_addr-v6-3-a603bf363218@rev.ng>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2026-02-25 23:46:04 +01:00
Anton Johansson
2b581da051 target/hppa: Define PA[20|1X] physical address space size
When converting virtual to physical addresses,
TARGET_PHYS_ADDR_SPACE_BITS is used under PA-RISC 2.0, and an explicit
cast to uint32_t is used under PA-RISC 1.X.  Replace the former with a
more specific macro limited to mem_helper.c, and make the latter
conversion explicit by defining the size of the physical address space
for PA-RISC 1.X.

Note: while 44 bits should be used for the 64-bit address space running
a C3700, 40 bits is still chosen as this is expected by the SeaBIOS
functional test.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Anton Johansson <anjo@rev.ng>
Message-ID: <20260218-phys_addr-v6-1-a603bf363218@rev.ng>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2026-02-25 23:46:04 +01:00
Max Chou
cf10af6c70 target/i386: Fix pseudo-NaN handling in FPATAN/FYL2XP1/FYL2X helpers
According to Intel's x87 FPU specification (Table 8-10, Vol. 1), arithmetic
operations on operands in unsupported formats (including pseudo-NaNs) must
return the QNaN floating-point indefinite value.

The helper functions for FPATAN, FYL2XP1, and FYL2X incorrectly check for
signaling NaN before checking for invalid encodings. This causes pseudo-NaNs
to be treated as valid signaling NaNs and silenced, rather than being
rejected as unsupported formats.

Reorder the checks to test floatx80_invalid_encoding before
floatx80_is_signaling_nan, matching the correct behavior already
implemented in helper_fscale.

Signed-off-by: Max Chou <max.chou@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Chao Liu <chao.liu.zevorn@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260204051756.667397-5-max.chou@sifive.com>
2026-02-24 16:19:57 +11:00