From e31f57e96bbdcd89f94a0316e8ca3d6b749aa9fb Mon Sep 17 00:00:00 2001 From: Jamin Lin Date: Mon, 25 May 2026 05:30:44 +0000 Subject: [PATCH] hw/misc/aspeed_scu: Add AST1040 A0 silicon revision ID MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add the AST1040 A0 silicon revision definition and register it in the supported Aspeed silicon revision table. Signed-off-by: Jamin Lin Reviewed-by: Cédric Le Goater Link: https://lore.kernel.org/qemu-devel/20260525053036.3305181-6-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater --- hw/misc/aspeed_scu.c | 1 + include/hw/misc/aspeed_scu.h | 1 + 2 files changed, 2 insertions(+) diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c index 9d9f43e6b5..c9b73a1148 100644 --- a/hw/misc/aspeed_scu.c +++ b/hw/misc/aspeed_scu.c @@ -562,6 +562,7 @@ static uint32_t aspeed_silicon_revs[] = { AST1060_A2_SILICON_REV, AST2700_A1_SILICON_REV, AST2700_A2_SILICON_REV, + AST1040_A0_SILICON_REV, }; bool is_supported_silicon_rev(uint32_t silicon_rev) diff --git a/include/hw/misc/aspeed_scu.h b/include/hw/misc/aspeed_scu.h index d003955428..c30940ab76 100644 --- a/include/hw/misc/aspeed_scu.h +++ b/include/hw/misc/aspeed_scu.h @@ -46,6 +46,7 @@ struct AspeedSCUState { #define AST2600_A3_SILICON_REV 0x05030303U #define AST1030_A1_SILICON_REV 0x80010000U #define AST1060_A2_SILICON_REV 0xA0030000U +#define AST1040_A0_SILICON_REV 0x81000000U #define AST2700_A1_SILICON_REV 0x06010103U #define AST2700_A2_SILICON_REV 0x06020103U