From 7ffc8958028c8e1539f1ccda8db6d4dd86f6e5e4 Mon Sep 17 00:00:00 2001 From: Jamin Lin Date: Wed, 25 Feb 2026 02:12:31 +0000 Subject: [PATCH] hw/i3c/aspeed: Add I3C bus get function MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit To retrieve the I3C bus object normally, the order is Aspeed I3C -> DW I3C[n] -> bus object, so make a nice wrapper for people to use. Signed-off-by: Joe Komlodi Reviewed-by: Jamin Lin Signed-off-by: Jamin Lin Tested-by: Jithu Joseph Link: https://lore.kernel.org/qemu-devel/20260225021158.1586584-18-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater --- hw/i3c/aspeed_i3c.c | 9 +++++++++ include/hw/i3c/aspeed_i3c.h | 3 +++ 2 files changed, 12 insertions(+) diff --git a/hw/i3c/aspeed_i3c.c b/hw/i3c/aspeed_i3c.c index 2700c5f4cd..bac8c55bb0 100644 --- a/hw/i3c/aspeed_i3c.c +++ b/hw/i3c/aspeed_i3c.c @@ -153,6 +153,15 @@ static const MemoryRegionOps aspeed_i3c_ops = { } }; +I3CBus *aspeed_i3c_get_bus(AspeedI3CState *s, uint8_t bus_num) +{ + if (bus_num < ARRAY_SIZE(s->devices)) { + return s->devices[bus_num].bus; + } + /* Developer error, fail fast. */ + g_assert_not_reached(); +} + static void aspeed_i3c_reset(DeviceState *dev) { AspeedI3CState *s = ASPEED_I3C(dev); diff --git a/include/hw/i3c/aspeed_i3c.h b/include/hw/i3c/aspeed_i3c.h index b8827d31d7..42c9eedd85 100644 --- a/include/hw/i3c/aspeed_i3c.h +++ b/include/hw/i3c/aspeed_i3c.h @@ -31,4 +31,7 @@ struct AspeedI3CState { DWI3C devices[ASPEED_I3C_NR_DEVICES]; uint8_t id; }; + +I3CBus *aspeed_i3c_get_bus(AspeedI3CState *s, uint8_t bus_num); + #endif /* ASPEED_I3C_H */